It is well known that many printers include a CPU and a memory management unit (MMU) which are both located on the same integrated circuit (IC). The MMU operates to translate virtual addresses (generated by processes being executed by the CPU) into physical addresses. By using virtual memory, a contiguous range of virtual addresses can be mapped to several non-contiguous areas of physical memory. The phrase “virtual address space” is the range of virtual addresses that is provided by the MMU. Typically, the virtual address space is divided into “virtual pages” which are of a pre-determined size.
Printers often provide for “direct memory access (DMA)” transfers to or from the printer's internal memory. In this context, DMA transfers refer to the process of transferring data (e.g., page description commands describing a document) to or from the printer's internal memory without intervention from the printer's central processor unit (CPU). Instead, the DMA transfers are (typically) implemented by a special purpose controller (referred to as a “DMA” controller) that resides within the printer.
During a DMA transfer, the DMA controller operates as a “bus master”. A bus master refers to a device capable of asserting control over a bus. As part of this function, the DMA controller causes addresses to be placed on the bus to address the printer's internal memory.
Some printers that make use of virtual memory include a DMA controller that only works with physical addresses. This can present a problem, as the printer's internal memory may become fragmented due to contiguous virtual memory addresses being mapped to non-contiguous areas in the physical memory.
One solution to this problem is to constrain each DMA transfer to within a single virtual page. Unfortunately, this solution reduces the amount of data that can be transferred during any one DMA transfer. As a result, multiple DMA transfers may be required to transfer a given amount of data. This is especially disadvantageous for printers (as opposed to other general purpose computers) since printers often perform DMA transfers of relatively large amounts of data which often exceeds the size of a typical virtual page.
Some general purpose computers include DMA controllers that work with virtual memory. An example of such a computer is given in Computer Architecture: a Quantitative Approach, page 527, by David A. Patterson and John L. Hennessy, 2nd ad., ISBN 1-55860-372-7. Typically, this type of DMA controller is provided with an associated set of registers. The registers are used to store a small number of virtual to physical address mappings. Prior to a DMA transfer, the computer's CPU stores the mappings in the register. The mappings are then used by the DMA controller, during a DMA transfer, to translate virtual addresses into physical addresses. Unfortunately, this implementation adds complexity and overhead which is associated with the registers and the operation of the CPU to update these registers prior to each DMA transfer. Implementing this solution in a printer, therefore, results in adding overhead, complexity and therefore cost to the printer.